This paper describes a fully programmable parallel processor LSI which integrates 128 SIMD RISC microprocessors, each operates in 100 MHz. The LSI achieves simultaneous and real-time multiple processing of driver assistance video recognition applications in software, while at the same time satisfies power efficiency requirement of an in-vehicle LSI. Based on four basic parallel methods and a software development environment including an optimizing compiler of an extended C language and video-based GUI tools, efficient development of real-time video recognition applications which effectively utilize the 128 micro-processors are facilitated. Result of a benchmark test using a high level language written for a robust lane-mark and vehicle detection application shows that the LSI can provide a four times better performance compared with a 2.4 GHz general purpose processor.


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    Title :

    A programmable parallel processor LSI for video-based driver assistance systems


    Contributors:
    Kyo, S. (author) / Koga, T. (author) / Okazaki, S. (author) / Kuroda, I. (author)


    Publication date :

    2003-01-01


    Size :

    450719 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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