The objective of this research is to study the performance of a high quality speech compression in real-time on a single-chip system. Based on voice over Internet protocol (VoIP) requirements, we have decided to implement a high quality speech coding (with signal-to-noise ratio, SNR of more than 10 dB), at a low bit rate of 8 kbit/s or less. The coder must have delay not more than 100 ms. The development results have exceeded the requirements. The bit rates are as low as 5.3 kbit/s and 6.3 kbit/s, with SNR of 11.52 dB and 12.72 dB, respectively. Total delay time is 60.3 ms. The program requires 76 MIPS computation and 43 Kword memory, thus fit within a single chip of 100 MIPS TMS320C5409.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Performance of a single-chip low bit-rate voice transcoder


    Contributors:


    Publication date :

    2013-11-01


    Size :

    336790 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    An improved hyperbaric speech transcoder

    Smail, Z. / Ogier, J.M. / Malherbe, J.C. et al. | Tema Archive | 2001


    A DCT domain frame-skipping transcoder

    Patil, V. / Kumar, R. | IEEE | 2005


    A DCT Domain Frame-Skipping Transcoder

    Patil, V. / Kumar, R. | British Library Conference Proceedings | 2005


    Aircraft navigation light power transcoder

    BEARD PAUL | European Patent Office | 2020

    Free access

    Utilization of low-complexity and drift-reduction architecture in downscaling transcoder

    Tsai, T.-H. / Lin, H.-Y. | British Library Online Contents | 2009