This paper introduces a novel software and hardware co-design flow using a co-simulator and a co-verifier platform. In the new design platform, different hardware failures can be injected automatically to test the software protection on potential unsafe behavior of the hardware. The structure of the system is introduced in part II of this paper. In part III&IV, we take a simple circuit as an example to show how we setup the components' model and how our simulation system works. And at last, we make a conclusion on the system, also the problems and challenges we are facing.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Software hardware co-simulation and co-verification in safety critical system design


    Contributors:
    Shi, Jin (author) / Liu, Weichao (author) / Jiang, Ming (author) / Che, HuiJun (author) / Chen, Lei (author)


    Publication date :

    2013-08-01


    Size :

    273653 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    Safety Critical Software System Verification Strategy

    McNeil, J. / Nation, D. / System Safety Society (U.S.) | British Library Conference Proceedings | 2006


    Safety Critical Software System Verification Strategy

    McNeil, J. / Nation, D. / System Safety Society | British Library Conference Proceedings | 2000




    Advanced Verification Techniques for Airborne Safety Critical Hardware (AIAA 2013-4565)

    Butka, B. / American Institute of Aeronautics and Astronautics | British Library Conference Proceedings | 2013