The Processing and Communications team at Los Alamos National Laboratory is currently designing a new system controller that will adhere to the 6U SpaceVPX (ANSI/VITA 78) specification and will be able to additionally function as a command- and data-handling single-board computer. The design is intended to meet the radiation hardness requirements for flight in geosynchronous Earth orbit (GEO) and employs QMLV and Class-S components. The system controller uses a quad-core LEON4 processor ASIC, an RTG4 FPGA for hardware co-processing, and has 1 GByte of EDAC-protected SDRAM. The design will support a combination of high-speed SERDES and SpaceWire ports on the control plane that will allow interoperability with OpenVPX (ANSI/VITA 65) so that low-cost, commercial enclosures, backplanes, modules, and other resources can be leveraged during the development cycle. Additional power control of 8-bit-wide SDRAM lanes has been added to assist with SEFI recovery. The design team is predicting total power consumption at 8 W. The anticipated real-time operating system for the board is VxWorks. A custom scrubber has been developed and will be deployed on the RTG4 FPGA to provide error detection and correction for SRAM-based FPGAs on payload modules. Cooling and mechanical hardness will be achieved with a conduction-cooled frame compliant with VITA 48.


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    Title :

    Radiation-hardened SpaceVPX system controller


    Contributors:
    Merl, Robert (author) / Graham, Paul (author)


    Publication date :

    2018-03-01


    Size :

    686901 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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