We have developed a 10-Gbit/s burst-mode clock and data recovery IC for future WBM/TDM-PON access networks. A fabricated IC (CMOS) is operated at 10 Gbit/s with preamble bits of 0-16, a duty-cycle variation tolerance of over 15% and a power consumption of 1.2 W.


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    Title :

    A 10-Gbit/s CMOS-burst-mode clock and data recovery IC for a WDM/TDM-PON access network


    Contributors:
    Kimura, S. (author) / Nogawa, M. (author) / Nishimura, K. (author) / Yoshida, T. (author) / Kumozaki, K. (author) / Nishihara, S. (author) / Ohtomo, Y. (author)


    Publication date :

    2004-01-01


    Size :

    133493 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



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