Chip Scale Atomic Clocks are a recently developed technology, that used together with a GNSS receiver helps to improve the performance of GNSS navigation solutions in some particular conditions [1]. Current GNSS receivers include a Temperature Compensated Cristal Oscillator (TCXO) clock which is characterized by a short term stability (τ = 1 second) of 2·10−9 seconds that leads to an error of 0.6 meters in pseudorange measurements. While a Chip Scale Atomic Clock (CSAC) [1] has a stability (τ = 1 second) of 2.5·10−10 seconds that implies a range error of 0.075 meters. The use of TCXO forces the inclusion of a time parameter in the navigation algorithms, which reduces the positioning performance in poor satellite constellation conditions, reflected in the Dilution of Precision (DoP) values [2]. The aim of the study presented on this paper is to characterize the impact of the Cesium Atomic clocks technology, specifically a CSAC clock, in high-grade GNSS receivers by evaluating the position scattering and the holdover.


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    Title :

    Characterization of Chip-Scale Atomic Clock for GNSS navigation solutions


    Contributors:


    Publication date :

    2015-10-01


    Size :

    1778281 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English




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