The paper essentially deals with the verification and debugging of the LC-3 Microcontroller, a 16 bit RISC Processor, using System Verilog. The LC-3 Design Under Test (DUT) used consists of a variety of different bugs in its sub-design units including the Fetch, Decode, Execute and Controller as well as bugs in its entirety. The bugs are identified with the help of various complex SV features like OOPS, Randomization, Functional Coverage, Assertions and UVM. The Mentor Graphics Questa Simulation Environment is used in conjunction with the System Verilog Hardware Verification Language for testing and identifying the root cause behind bugs in the design. The LC-3 microcontroller used for verification is assumed to work fine as long as it follows the design specifications. Otherwise, any misaligned behavior with the design specs is treated as a bug. The paper provides for an efficient method of using System Verilog, a latest trend in the EDA Industry today, as a language of choice for debugging by Verification Engineers in the Embedded Systems Industry.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Verification and Debugging of LC-3 Test Bench Environment using System Verilog


    Contributors:


    Publication date :

    2018-03-01


    Size :

    4946281 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    Verilog Based Efficient Traffic Light System

    Gunna, Poorna Shashank / Ontipuli, Leela Sai Srinivas / Megalingam, Rajesh Kannan | IEEE | 2024


    Fallstudie: Entwicklung einer System-Verilog-Testbench

    British Library Online Contents | 2007


    External environment control machine performance debugging system and debugging method thereof

    ZOU JUN / WANG XUEJUN / XU WEI et al. | European Patent Office | 2024

    Free access

    Thermal Design and Test Verification of the NEMO Optical Bench

    Hurley, Mike / O'Connell, Tamara | SAE Technical Papers | 2000


    Thermal Design and Test Verification of the NEMO Optical Bench

    O Connell, T. / Hurley, M. / SAE | British Library Conference Proceedings | 2000