Multilevel inverters (MLIs) have gained popularity due to the emerging medium and high-power drive applications such as heavy-duty electric vehicles, electric aircraft, and urban air mobility. A neutral-point-clamped, cascade H-Bridge and flying capacitors are the potential candidates for these applications, but these conventional MLIs have either stacked or floating capacitors causing voltage unbalancing and drifting issues in variable-speed operation. In this paper, a new neutral-point-less (NPL) MLI topology is proposed, which requires neither stacked nor floating capacitors, topologically addressing the voltage balancing and drifting issues. The new NPL MLI topology, namely X-type inverter, reduces the required capacitance and volume of the dc-link capacitor by over 75% compared to that of the conventional MLI topologies. In addition, the X-type inverter produces two equal and opposite common-mode (CM) voltage waveforms, which cancel out the capacitive leakage current for the minimum CM electromagnetic interference (CM EMI) noise. This paper introduces the new NPL MLI topology and the underlying principle of multilevel operation without stacked or floating capacitors. The simulation results verify the NPL multilevel operation with a single dc-link capacitor and over 50 dBuV CM EMI noise reduction compared to that of the conventional two-level inverter.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Operating Principle of Neutral-Point-Less (NPL) Multilevel Inverter Topology: X-type Inverter


    Contributors:


    Publication date :

    2022-06-15


    Size :

    1782673 byte




    Type of media :

    Conference paper


    Type of material :

    Electronic Resource


    Language :

    English



    Neutral-Point-Less (NPL) Multilevel Inverter Topology with Single DC-link Capacitor: H-type Inverter

    Benson, Mikayla / Dong, Xiaofeng / Guven, Musab et al. | IEEE | 2022


    Three-Phase Magnetic-Less Boosting Multilevel Inverter Topology With Reduced Components

    Sandeep, N. / Ali, J S M / Kumar Verma, Arun et al. | IEEE | 2019


    Cascade multilevel inverter based topology with reduced switch count

    Gupta, Hemant / Yadav, Arvind / Maurya, Sanjay | IEEE | 2020



    Asymmetrical Three-Phase Multilevel Inverter for Grid-Integrated PLL-Less System

    Kumar, Rohit / Chaudhari, Madhuri A. / Chaturvedi, Pradyumn et al. | IEEE | 2023