A system and method may monitor a mission critical processor power supply and recover from an intermittent power interruption. A subsystem of one or more processors may be tasked with a power monitoring function enabling processor self-monitoring and recovery. The subsystem monitors the power state of the processors and should a power interruption be sensed, the subsystem may be directed by a memory source external to the primary memory source for normal system operation. The subsystem directs each processing function within each processor to disable and remain disabled until the power interruption ceases. Once the power interruption is complete, the subsystem directs each processing function to refresh and restore to a previous state of full functionality.
Power warning monitor system and method
2016-07-12
Patent
Electronic Resource
English
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