A multilevel power converter includes a plurality of switches, a first DC link capacitor, a second DC link capacitor, and one or more processors configured to: generate, for a duty cycle of the multilevel power converter, a pulse width modulated pulse pattern in accordance with a reduced common mode voltage scheme; modify the pulse width modulated pulse pattern to render a modified pulse pattern; and cause the plurality of switches to implement the duty cycle based at least in part on the modified pulse pattern to render a common mode voltage pulse to balance voltages at the first DC link capacitor and the second DC link capacitor.
REDUCED COMMON MODE VOLTAGE PULSE WIDTH MODULATION SWITCHING SCHEME WITH CAPACITOR VOLTAGE BALANCING FOR A MULTILEVEL POWER CONVERTER
2024-07-25
Patent
Electronic Resource
English
IPC: | G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung / B64D Ausrüstung für Flugzeuge , EQUIPMENT FOR FITTING IN OR TO AIRCRAFT / H02M APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS , Anlagen zur Umformung von Wechselstrom in Wechselstrom, von Wechselstrom in Gleichstrom oder umgekehrt, oder von Gleichstrom in Gleichstrom und zur Verwendung in Netzen oder ähnlichen Stromversorgungssystemen |
Linear Voltage Pulse-Width/Amplitude Converter
NTIS | 1970
|Pulse-Width-to-Analog-Voltage Converter
NTRS | 1985
|Power system architecture with reduced common mode voltage
European Patent Office | 2022
|