Diagnosing whether controllers of internal vehicle systems are the source of failures detected by a system control managing a vehicle such as a spacecraft. Highspeed data is received via at a field programmable gate array (FPGA) embedded in an assembly of the vehicle. The FPGA includes a controller and a digital diagnostic interface. In one embodiment, the diagnostic interface utilizes Very Highspeed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) for performance modeling of a controller configured to control at least one internal system within the vehicle. The VHDL performance models the controller. Upon receiving an indication of a failure, the performance modeling of the controller is used to ascertain whether or not the controller is the source of the failure. Disassembly of the assembly housing the internal system is not required in order to ascertain whether or not the controller is the source of the failure.
HIGHSPEED DATA INTERFACE FOR DISTRIBUTED SYSTEM MOTOR CONTROLLERS
2020-10-01
Patent
Electronic Resource
English
IPC: | B60W CONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION , Gemeinsame Steuerung oder Regelung von Fahrzeug-Unteraggregaten verschiedenen Typs oder verschiedener Funktion / G07C TIME OR ATTENDANCE REGISTERS , Zeit- oder Anwesenheitskontrollgeräte / G05B Steuer- oder Regelsysteme allgemein , CONTROL OR REGULATING SYSTEMS IN GENERAL / G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung |
HIGHSPEED DATA INTERFACE FOR DISTRIBUTED SYSTEM MOTOR CONTROLLERS
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