A system includes a real-time computer having a real-time clock programmed to output a clock signal, a binary clock display programmed to display a first amount of time that has elapsed according to the clock signal, a host computer programmed to simulate a virtual environment including a virtual clock display programmed to represent a second amount of time that has elapsed according to the clock signal, and a latency processor programmed to calculate latency of the host computer based on a difference between the first amount of time and the second amount of time.


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    Title :

    Simulation latency indication


    Contributors:
    TAMM BRIAN (author) / LIU HAN (author)

    Publication date :

    2019-09-03


    Type of media :

    Patent


    Type of material :

    Electronic Resource


    Language :

    English


    Classification :

    IPC:    G06F ELECTRIC DIGITAL DATA PROCESSING , Elektrische digitale Datenverarbeitung / B60W CONJOINT CONTROL OF VEHICLE SUB-UNITS OF DIFFERENT TYPE OR DIFFERENT FUNCTION , Gemeinsame Steuerung oder Regelung von Fahrzeug-Unteraggregaten verschiedenen Typs oder verschiedener Funktion / G06K Erkennen von Daten , RECOGNITION OF DATA / H04L TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION , Übertragung digitaler Information, z.B. Telegrafieverkehr / H04N PICTORIAL COMMUNICATION, e.g. TELEVISION , Bildübertragung, z.B. Fernsehen



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    Toward Minimal Latency Simulation Systems

    Moore, R. / Pope, C. / Foxlin, E. et al. | British Library Conference Proceedings | 1998


    Toward minimal latency simulation systems

    Moore, Ronald / Pope, Charles / Foxlin, Eric | AIAA | 1998


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