The invention provides an anti-step cascade PI hysteresis compensation control method and device. The outer loop calculation method comprises the following steps: step 1, subtracting an n-order sine harmonic component zs extracted from a corresponding feedback signal Z (t) from each order harmonic sine component Usn of an outer loop expected harmonic signal; subtracting an n-order cosine harmonic component zc extracted from the corresponding feedback signal Z (t) from each-order harmonic cosine component Ucn to obtain an error e (k) of the kth sampling step; 2, according to zc, zs and the error e (k), an initial parameter I0 of the PI controller and an output signal u (k) of the kth sampling step are obtained through calculation; 3, enabling the error e (k) to pass through a PI controller module to obtain a compensated harmonic cosine component Ucnctr and a compensated sine component Usnctr; 4, generating a cosine component NPc and a sine component NPs of an outer ring output signal according to the compensated harmonic cosine component Ucnctr and the compensated sine component Usnctr; and 5, generating an inner ring desired signal according to the cosine component NPc and the sine component NPs of the outer ring output signal, and transmitting the inner ring desired signal to the FIFO cache.
本申请提供一种防阶跃的级联PI迟滞补偿控制方法及装置,所述外环回路计算方法包括:步骤1:外环期望的谐波信号的各阶谐波正弦分量Us_n减去对应的反馈信号Z(t)中提取的n阶正弦谐波分量zs;各阶谐波余弦分量Uc_n减去对应的反馈信号Z(t)中提取的n阶余弦谐波分量zc,得到第k采样步的误差e(k);步骤2:根据zc、zs和误差e(k),计算得到PI控制器的初始参数I0和第k采样步输出信号u(k);步骤3:将误差e(k)通过PI控制器模块,得到补偿后的谐波余弦分量Uc_n_ctr和正弦分量Us_n_ctr;步骤4:将补偿后的谐波余弦分量Uc_n_ctr和正弦分量Us_n_ctr,生成外环输出信号余弦分量NP_c和正弦分量NP_s;步骤5:根据外环输出信号余弦分量NP_c和正弦分量NP_s,生成内环期望信号,并传输到FIFO缓存中。
Anti-step cascade PI hysteresis compensation control method and device
一种防阶跃的级联PI迟滞补偿控制方法及装置
2024-12-06
Patent
Electronic Resource
Chinese
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