The invention relates to an anti-radiation latch circuit, electronic equipment and an aircraft. The latch circuit comprises a storage module; the storage module comprises ten N-channel metal oxide semiconductor (NMOS) tubes, four P-channel metal oxide semiconductor (PMOS) tubes and six storage nodes. Wherein the first storage node, the second storage node, the third storage node and the fourth storage node are all surrounded by NMOS transistors to form N polarity reinforcement, so that the first storage node, the second storage node, the third storage node and the fourth storage node only can generate negative voltage pulses of '1-0' and '0-0'. The source isolation technology is used for the fifth storage node and the sixth storage node, so that the fifth storage node and the sixth storage node can only generate negative voltage pulses of 1-0 and 0-0, and therefore, the number of sensitive nodes of the circuit can be effectively reduced and the stability of the circuit can be improved by using the two reinforcing technologies. When the circuit is applied to an aircraft, the problem that a storage circuit in an existing aircraft is easily influenced by the cosmic radiation environment can be solved.
本申请涉及一种抗辐射锁存器电路、电子设备和航空器,锁存器电路包括:存储模块;存储模块包括十个NMOS管和四个PMOS管以及六个存储节点。其中,第一存储节点、第二存储节点、第三存储节点、第四存储节点均由NMOS晶体管包围,形成N极性加固,使得第一存储节点、第二存储节点、第三存储节点、第四存储节点仅能产生“1‑0”和“0‑0”的负电压脉冲。第五存储节点、第六存储节点使用了源隔离技术,使得第五存储节点、第六存储节点上也仅能产生“1‑0”和“0‑0”的负电压脉冲,因此,本发明所使用的两种加固技术可以有效减少电路敏感节点数量,提高电路稳定性。当该电路应用于航空器时,可以解决现有航空器中的存储电路容易受到宇宙辐射环境影响的问题。
Anti-radiation latch circuit, electronic equipment and aircraft
抗辐射锁存器电路、电子设备和航空器
2024-04-09
Patent
Electronic Resource
Chinese
Dual-node tolerant anti-radiation latch circuit, memory and aircraft
European Patent Office | 2024
|