We describe heavy ion test results for two new SEU tolerant latches based on transition nand gates, one for single rail asynchronous and the other for dual rail synchronous designs, implemented in AMI 0.5microprocess.
SEU Performance of TAG Based Flip Flops
Meeting held in Seattle, WA on July 11-15, 2005
01.01.2005
Aufsatz (Konferenz)
Keine Angabe
Englisch
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