Hard limiters, followed by a D-type flip-flop as a digital-signal-polarity detector, are very effective receiver/phase detectors for low frequency (LF) and very low frequency (VLF) navigation receivers. However the performance not only depends on the signal quality, but also on the specifications of the hard limiter and the flip-flop. Analysis of the tracking accuracy is given as a function of the dc offsets of the limiter and the flip-flop, the linear gain of the limiter, the signal-to-noise ratios of one or more input signals, and the power consumption of the limiter. The results are presented in formulas and graphs for application by circuit designers. A design example of a low-power, high-gain limiter is given.


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    Titel :

    Analysis and Design Considerations of Hard Limiters for LF and VLF Navaid Receivers


    Beteiligte:

    Erschienen in:

    Erscheinungsdatum :

    01.05.1984


    Format / Umfang :

    2593608 byte




    Medientyp :

    Aufsatz (Zeitschrift)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch




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