The joint transform correlation technique is used to design a binary multiprocessor that can perform full addition and full subtraction in parallel. A new coding scheme is designed for the proposed technique. Finally, simulation results are presented to verify the effectiveness of the proposed scheme.<>


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    Titel :

    Multiprocessor design using joint transform correlator


    Beteiligte:
    Alam, M.S. (Autor:in)


    Erscheinungsdatum :

    01.01.1993


    Format / Umfang :

    458935 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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