The invention provides a multilevel fault tolerance reinforcement satellite information processing system based on an SRAM (Static Random Access Memory) FPGA (Field Programmable Gate Array), and relates to satellite information processing. The invention aims at solving the problems that when the SRAM FPGA is used as a satellite information processing system, the system reliability is influenced by single event upset and latch-up effects and the like, and a satellite practical task is not combined with a protection measure. The system is realized through the following modules including a memory module, a checking and control module, a memory configuration module, a state storage Flash module, an IO/BUS module, an anti-latch power supply module and a main processing module, wherein the memory module is used for data storage and program loading of a main processing module; the checking and control module is used for single event upset effect immunization; the memory configuration module is used for storing initial configuration files and remote updating configuration files; the state storage Flash module is used for realizing the data access state; the IO/BUS module is used for realizing communication and control; the anti-latch power supply module is used for system single event latch-up effect protection and power supplying to each module; and the main processing module is used for data processing and satellite event management. The multilevel fault tolerance reinforcement satellite information processing system based on the SRAM FPGA is applied to the technical field of satellites.
Multilevel fault tolerance reinforcement satellite information processing system based on SRAM FPGA
2015-11-11
Patent
Elektronische Ressource
Englisch
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