Provided is a printed circuit substrate and noise suppressing structure that enable the layout restrictions of components on a substrate to be made as small as possible and enable noise to be suppressed. A printed circuit substrate (110) is configured so that odd number layer conductor-patterns (111, 113, 115) and even number layer conductor-patterns (112, 114, 116) are alternately disposed in the vertical direction with insulation layers sandwiched therebetween. The following portions have the same shape and overlap at the same position in the vertical direction: portions of the odd number layer conductor-patterns (111, 113, 115) excluding a prescribed region for connecting a first through hole (117) and a prescribed region for insulating with respect to a second through hole (118); and portions of the even number layer conductor-patterns (112, 114, 116) excluding a prescribed region for connecting the second through hole (118) and a prescribed region for insulating with respect to the first through hole (117).


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    Titel :

    Printed circuit substrate and noise suppressing structure


    Beteiligte:
    SHINKAWA NAOTO (Autor:in) / FUKINUKI SHIGERU (Autor:in)

    Erscheinungsdatum :

    16.09.2015


    Medientyp :

    Patent


    Format :

    Elektronische Ressource


    Sprache :

    Englisch


    Klassifikation :

    IPC:    H05K PRINTED CIRCUITS , Gedruckte Schaltungen / B62D MOTOR VEHICLES , Motorfahrzeuge



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