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title: Still-image compression II
Two-pass rate-constrained still image compression
Still-image compression II : 29 - 30 January 1996, San Jose, California
Implementation of still-image compression-decompression scheme on FPGA circuits [2669-10]
Embedded Laplacian pyramid still image coding using zerotrees [2669-20]
Hardware implementation of LOTRRP compression for real-time image compression [2669-08]
Range image compression [2669-13]
Codebook reduction in fractal image compression [2669-05]
Space adaptive wavelet packet image compression [2669-17]
Lean domain pools for fractal image compression [2669-06]
Error-resilient image compression based on JPEG [2669-14]
Predictive codebook design for lossless image compression [2669-01]
Quadtree-based transform coding for multispectral image compression [2669-18]
JPEG-based image compression for low-bit-rate coding [2669-12]
About a New Conception of Internal Combustion Engine Construction II. Oscillating Engines
New recursive VLSI architectures for forward and inverse discrete cosine transform [2669-09]
Vector quantization with distance constraints for enhanced post-processing [2669-03]
Fast nearest-neighbor search algorithm [2669-11]
Block wavelet transform for sub-image coding/decoding [2669-21]
Vector excitation coding technique for image data [2669-04]
Enhancement of decompressed images by optimal shift-invariant wavelet packet basis [2669-16]