Fault detection is the major method used to enable a fault‐tolerant system to acquire reliability and reconfigurability. This chapter discusses the concept and scope of fault detection techniques of computer system components (CPU, memory, and I/O) computer architecture, and implementation. It also discusses the 80C86 self‐testing system widely used in the space industry, which can be extended to other CPUs. The 80C86 is a 16‐bit CPU IC that comprises an execution unit (EU) and a bus interface unit (BIU). According to instruction operation and CPU architecture, instruction sets can be classified into three groups: the register related instruction set, the arithmetic operation instruction set, and the control related instruction set. In space environments, the major cause of computer transient faults is space radiation, the manifestation of which is single event upset (SEU) phenomena. Finally, the chapter focuses on transient fault detection induced by SEU.


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    Title :

    Fault Detection Techniques


    Contributors:
    Yang, Mengfei (author) / Hua, Gengxin (author) / Feng, Yanjun (author) / Gong, Jian (author)


    Publication date :

    2017-03-15


    Size :

    21 pages




    Type of media :

    Article/Chapter (Book)


    Type of material :

    Electronic Resource


    Language :

    English




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