In the paper the high-speed architecture of built-in self test (BIST) for double data rate synchronous dynamic random access memory (DDR SDRAM) is proposed. The BIST proposed can make self testing at its operating frequency that improves the reliability of the results obtained.
The Architecture of DDR Memory Device Self Test Tools for Spacecraft Control Systems
Russ. Aeronaut.
Russian Aeronautics ; 64 , 2 ; 330-336
2021-04-01
7 pages
Article (Journal)
Electronic Resource
English
NTIS | 1986
|NTRS | 1986
|Mars Sample Return Spacecraft Systems Architecture
NTRS | 1999
|Tools and methods for spacecraft control systems: a geno-fuzzy approach
Tema Archive | 1998
|