This paper describes how new transistors layouts can mitigate failures Induced by atmospheric radiation, focusing on the total ionizing dose (TID) effects. By conducting an experimental comparative study of the TID effects between the Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) manufactured with new layouts proposals and the standard layout (Conventional), for devices exposed to 10 keV X-ray irradiation using a Shimadzu XRD-7000 equipment, this paper suggests a new approach of layouts to have a better performance in radiation environment with low cost impact, lower power consumption, more speed and they could keep robustness and reliability.


    Access

    Check access

    Check availability in my library

    Order at Subito €


    Export, share and cite



    Title :

    Understanding how to Mitigate Failures Induced by Atmospheric Radiation with New Transistors Layouts for Processors


    Additional title:

    Sae Technical Papers



    Conference:

    23rd SAE Brasil International Congress and Display ; 2014



    Publication date :

    2014-09-30




    Type of media :

    Conference paper


    Type of material :

    Print


    Language :

    English




    Designing to Mitigate Food Growing Failures in Space

    Jones, Harry | SAE Technical Papers | 2004


    Features - Understanding Motor Shaft Failures

    Bonnett, Austin H. | Online Contents | 1999


    Railroad shop layouts

    Kingsley, F.A. | Engineering Index Backfile | 1910


    Signaling special layouts

    Bagley, F.H. | Engineering Index Backfile | 1927


    Wing Sections Without Layouts

    Allen, C.F. | Emerald Group Publishing | 1947