This paper discusses the implementation of a multiple processor computer architecture in the Variable Stability In-Flight Simulator Test Aircraft (VISTA). The key to this aircraft's simulation capabilities is a sophisticated Variable Stability System (VSS) comprised of ten central processing units (CPUs), nine of which are programmed mostly in Ada. Efficiency is achieved in the nine Central Processing Units by the use of Direct Memory Access (DMA) interfaces. DMA allows one computer (or interface board) to directly access the memory of another, without involving the CPU in either computer. This feature allows data to be transferred between computers in the system while other computer tasks are being performed. In addition, by using interrupts to control scheduling, a minimum of overhead is needed to implement the simple real-time scheduling needed for this application.
Parallel processors of the VISTA/F-16 in-flight simulator
Parallelprozessoren des Flugsimulators VISTA/F-16
1991
9 Seiten, 7 Bilder, 4 Quellen
Aufsatz (Konferenz)
Englisch
Variable Stability In-Flight Simulator Test Aircraft (VISTA)
British Library Conference Proceedings | 1996
|Variable Stability Inflight Simulator Test Aircraft (VISTA)/F-16 Flight Test Program Overview
British Library Conference Proceedings | 1995
|X-62 VISTA Simulation and Autonomy Flight Testing
TIBKAT | 2023
|