SSP, a signal processor for CCD or CMOS photodetectors to be used in severe radiation environment and aerospace applications, is presented in this paper. It collects data from external sensors and processes them before digitization. The front-end electronics has a CDS and 7 high-speed Sample/Hold input channels, all with programmable gain between 1 and 4. The internal 12 bit pipelined ADC can be used up to 5 Msamples/s and is guaranteed from missing codes. A self-calibration function allows to minimize (ideally eliminate) all non-linearity effects due to internal components mismatch. A general-purpose 12-bit 1 MHz current DAC is implemented and can be used for offset corrections. SSP is designed in order to maintain his functionality and performance in space environment and to withstand TID > 1Mrad. The device is SEL free, and it has a SEU tolerance >70 MeV/mg cm2. Several auxiliary structures make easier to observe internal states and signals in the chip, during its normal functionality and greatly improve its reliability. All the tests performed on the prototypes show the functionality of the design and the validity of the techniques applied to improve the radiation immunity of the component.


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    Titel :

    Rad-hard ASIC for photodetector signal processing


    Weitere Titelangaben:

    Strahlungsfester ASIC für die Photodetektor-Signalverarbeitung


    Beteiligte:
    Brandani, F. (Autor:in) / Chicca, S. (Autor:in) / Puccini, S. (Autor:in) / Stagi, M. (Autor:in)


    Erscheinungsdatum :

    2002


    Format / Umfang :

    5 Seiten, 7 Bilder, 4 Tabellen, 8 Quellen




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch




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