A computer aid to the performance of a digital circuit stress analysis has been developed and is designed such that a clerk may input circuit interconnection data directly from a schematic with little or no involvement on the part of an engineer. The computer performs the analysis at a significantly reduced cost and in a much shorter time than is possible with a manual analysis. In addition to the increased accuracy and improved vishibility, the computer assistance allows the engineer time to pursue other equally beneficial tasks which may prove more challenging. Presented is a discussion of the events leading to the determination of the need for this computer aid and the theory of operation of the program itself. An illustrative example of a sample input and analysis is included. Additionally, the many benefits realized, with virtually no added cost, are summarized. It is shown that these benefits fall both within and outside the realm of stress analysis and the reliability engineering discipline in general, and illustrates how they can be put to use to further support design efforts. An actual cost and time savings summary is also provided.


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    Titel :

    Computer aided stress analysis of digital circuits


    Weitere Titelangaben:

    Computerunterstuetzte Spannungsanalyse von digitalen Schaltungen


    Beteiligte:
    Bannan, M.W. (Autor:in) / Banghart, J.M. (Autor:in)


    Erscheinungsdatum :

    1985


    Format / Umfang :

    7 Seiten, 5 Bilder


    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch





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