This paper presents a single-chip 32bit RISC microcontroller boarding on MY1998 dedicated to highly complicated powertrain management. The high performance 32bit RISC CPU provides the only solution to meet requirements of drastic CPU performance enhancement and integration.Furthermore, a 32bit counter, based on a 20 MHz clock, and a 32bit multiplier make possible misfire detection and precise analysis of the engine management strategy, especially cylinder individual air-fuel ratio control.


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    Titel :

    A Single-chip RISC Microcontroller Boarding on MY1998


    Weitere Titelangaben:

    Sae Technical Papers


    Beteiligte:
    Watanabe, Akihiko (Autor:in) / Kaneyasu, Masayoshi (Autor:in) / Asano, Michio (Autor:in) / Tanaka, Satoshi (Autor:in) / Baba, Shrio (Autor:in)

    Kongress:

    International Congress & Exposition ; 1997



    Erscheinungsdatum :

    1997-02-24




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch




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