Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.


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    Titel :

    Addressable-Matrix Integrated-Circuit Test Structure


    Beteiligte:

    Erschienen in:

    Erscheinungsdatum :

    01.11.1991



    Medientyp :

    Sonstige


    Format :

    Keine Angabe


    Sprache :

    Englisch





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