Differencing circuit cancels error caused by switching transistors capacitance. In integrate and hold circuit using JFET switch, gate-to-source capacitance causes error in output voltage. Differential connection cancels out error. Applications in systems where very low voltages sampled or many integrate-and -hold cycles before circuit is reset.


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    Titel :

    Error-Compensated Integrate and Hold


    Beteiligte:
    Matlin, M. (Autor:in)

    Erschienen in:

    Erscheinungsdatum :

    01.04.1984



    Medientyp :

    Sonstige


    Format :

    Keine Angabe


    Sprache :

    Englisch




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