Autonomous spacecraft control and data processing have recently become realizable due to advanced fault tolerant techniques coupled with the development of very high scale integrated circuits. A method of utilizing present integrated circuit componentry with future technology insertion has been developed on the FTSC Program. The FTSC is designed to support a variety of spaceborne missions with a 95% probability in performance, for five to seven years. Besides easing the ground station scheduling requirements, this capacity increases the overall satellite survivability. The purpose of this paper is to present a concept of achieving the survivability by the utilization of various fault tolerant techniques.


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    The fault-tolerant spaceborne computer

    Fanelli, E.V. / Hecht, H. | Tema Archiv | 1977


    The fault-tolerant spaceborne computer

    FANELLI, E. / HECHT, H. | AIAA | 1977



    Spaceborne mass storage device with fault-tolerant memories

    Haraszti, T.P. / Mento, R.P. / Moyer, N.E. | Tema Archiv | 1990


    On the feasibility of a spaceborne fault-tolerant hypercube

    RENNELS, DAVID / MATHUR, FRANK / CHAU, SAVIO et al. | AIAA | 1989