TRW has developed a single chip radiation hardened 32-bit RISC microprocessor, the RH32S. The RH32S is based on TRW's 5-chip version. It has over five million transistors and is implemented using 0.35 /spl mu/m SOI standard cell technology. The high-performance architecture provides greater than 40 million instructions per second (MIPS) at 50 MHz while only using six watts of power. The RH32S is ideal for space and airborne applications requiring data handling, real-time control, and on-board data analysis. It is currently being designed into multiple flight systems.


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    Titel :

    Radiation hardened 32-bit RISC microprocessor


    Beteiligte:
    Hwang, A.S. (Autor:in)


    Erscheinungsdatum :

    2000-01-01


    Format / Umfang :

    803994 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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