The scaling of the commercially popular bulk MOSFETS faces two major challenges as minimization of leakage current and reduction in device to device variability to increase yield. In this paper, an improved low power adiabatic logic based on FinFET has been proposed. FinFET posse's lower leakage current and high on-state current which increase the performance and save area compared to CMOS adiabatic logic. For validating our idea we design power gated adiabatic inverter circuits using techniques like 2N2N2P, DCPAL, PFAL, IPAL and Fin SAL. We have also designed Fin SAL based AND/NAND and XOR/XNOR gates. The test circuit has been demonstrated based on 32-nm FinFET Predictive Technology Model. The simulation results show that adiabatic circuit based on FinFET devices achieve power reduction.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    A novel design of low power FinFET adiabatic circuits for VLSI applications


    Beteiligte:
    Madhuri (Autor:in) / Sunila, D. (Autor:in) / Venkatesh, G. (Autor:in) / Babu, M. Rajan (Autor:in)


    Erscheinungsdatum :

    01.04.2017


    Format / Umfang :

    360558 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Design of low power AOI FinFET circuits at 7nm

    Kajal / Sharma, Vijay Kumar | IEEE | 2020


    Processes for VLSI Circuits

    Wade, T. E. | NTRS | 1984


    Optimizing costs of VLSI circuits

    Cook, K. B., Jr. / Kerns, D. V., Jr. | NTRS | 1980


    Multichip modules for today's VLSI circuits

    Moravec, T.J. / Jensen, R.J. / Coogan, S.A. et al. | Tema Archiv | 1990


    A Novel Analog VLSI Implementation of Wavelet Transform Based on SI Circuits

    Liu, Meirong / Hu, Qinchun / He, Yigang | IEEE | 2008