A Binary Phase Shift Keying (BPSK) demodulator using squaring Loop technique is designed and successfully implemented, hardware realization of demodulator architecture has been carried out and results are presented. The recovered output is differentially decoded to mitigate the phase ambiguity in BPSK demodulation process. The fabricated demodulator works at a carrier frequency of 8 KHz and has been tested at data rate of 1Kbps. Although the fabricated BPSK demodulator is tested for the data rate of 1Kbps, yet it can be tested for any data rate up to 8Kbps.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    Design and implementation of BPSK demodulator for onboard satellite telecommand receiver


    Beteiligte:
    Nawaz, Haq (Autor:in)


    Erscheinungsdatum :

    2015-06-01


    Format / Umfang :

    1034954 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    BPSK Demodulator Signal Processing for Satellite Communication System

    Belkacem, Yasmina Mohamed / Bentata, Salah Eddine | IEEE | 2019


    Binary Quantized Digital BPSK Demodulator

    Kumar, A. R. / Pujari, V. K. / Lakshminarasimhan, P. et al. | British Library Conference Proceedings | 2006



    FPGA Implementation of CCCDS Standards Based on Satellite Telecommand System

    Gaffour, Khadidja / Bentata, Salah Eddine / Benzina, Mohammed Berroua | IEEE | 2023


    Telecommand Validation and Verification software Design and Implementation

    Qu, Yi / Zeng, Lingchuan / Li, Dapeng et al. | AIAA | 2016