This paper reports on the progress toward implementing optical-digital building blocks necessary to accomplish a system-on-package module architecture for high-performance multiprocessors. In this architecture, the memory access delay (MAD) bottleneck is minimized by using a 3-D distributed shared memory field in which high speed optical interconnects deliver data to and from each processor in a cluster to each memory controller/MX-DMX in the field, each memory controller being connected to a small cluster of main memory via a short, high aggregate speed copper bus that essentially matches the intrinsic MAD of the DRAM chip.
A digital-optical system-on-package module architecture for high performance multiprocessors
2004-01-01
103206 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
A Digital-Optical System-on-Package Module Architecture for High Performance Multiprocessors
British Library Conference Proceedings | 2004
|Optical Buffering for Chip Multiprocessors: A 16GHz Optical Cache Memory Architecture
British Library Online Contents | 2013
|HYFI: Architecture-Independent Parallelism on Networks of Multiprocessors
British Library Online Contents | 2003
|Highly reliable multiprocessors
NTRS | 1977
|Fault-free performance validation of avionic multiprocessors
Tema Archiv | 1986
|