This paper reports on the progress toward implementing optical-digital building blocks necessary to accomplish a system-on-package module architecture for high-performance multiprocessors. In this architecture, the memory access delay (MAD) bottleneck is minimized by using a 3-D distributed shared memory field in which high speed optical interconnects deliver data to and from each processor in a cluster to each memory controller/MX-DMX in the field, each memory controller being connected to a small cluster of main memory via a short, high aggregate speed copper bus that essentially matches the intrinsic MAD of the DRAM chip.


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    Titel :

    A digital-optical system-on-package module architecture for high performance multiprocessors


    Beteiligte:
    Gee-Kung Chang, (Autor:in) / Guidotti, D. (Autor:in) / Zhaoran Huang, (Autor:in) / Fuhan Liu, (Autor:in) / Yin-Jung Chang, (Autor:in) / Jianjun Yu, (Autor:in) / Tummala, R.R. (Autor:in)


    Erscheinungsdatum :

    2004-01-01


    Format / Umfang :

    103206 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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