This paper presents a new three-phase three-level inverter. The proposed three-phase three-level inverter consists of a two-level inverter and a pair of anti-series switch connected between each output phase and the neutral of the load. The three levels in the output pole voltage is obtained by considering the effect of the device junction capacitance (DJC) across the power device switch. The conventional three-phase two-level inverter will normally generate two levels in the pole voltage. By including the DJC across the switch, the conventional three-phase two-level inverter can able to generate an additional level in the pole voltage so that the number of levels in the pole voltage has increased to three. In order to verify the operation of the proposed three-level inverter, the simulation results were also presented.


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    Titel :

    A New Three-Phase Three-Level Inverter Obtained From Two-Level Inverter By Considering the Effect of Device Junction Capacitance Across the Switch


    Beteiligte:
    Ratrey, Shashank Dev (Autor:in) / Hota, Arpan (Autor:in) / Sonti, Venu (Autor:in) / Jain, Sachin (Autor:in)


    Erscheinungsdatum :

    09.08.2023


    Format / Umfang :

    1413769 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch