This paper describes plans and progress made on the MMGR program funded jointly by Air Force Research Laboratory (AFRL), GPS Joint Program Office (JPO) and industry that started in April 2003. The Honeywell/Rockwell Collins MMGR program starts with a minimum configuration of the GPS receiver (e.g. low end commercial GPS) and develop a new RF front-end design using mixed mode CMOS technology with lowest cost components and processes over the first year of the program. The front-end Application Specific Integrated Circuit (ASIC) design have a modular and flexible architecture based on reuseable macro-cells. This initial RF front-end design is evolved and targeted to meet specific commercial, military and space application requirements during the subsequent development iterations over the last two years of the program and beyond. Rockwell Collins demonstrates feasibility of using a digital device to create an M-code capable, high anti-jam GPS system. This shows a path to an adaptable MMGR that enables flexibility and easy upgradeability for both military and commercial GPS receivers and adheres to GPS Modernization/GPS III receiver specifications. The emphasis of the Rockwell Collins task is to improve anti-jam (AJ) and anti-interference capability of the GPS receivers through miniaturization of the anti-jamming (AJ) electronics and improvements in ultra-tight coupling (UTC) of a GPS receiver and an Inertial Measurement Unit (IMU).
Military/civilian mixed-mode Global Positioning System (GPS) receiver (MMGR)
2004 IEEE Aerospace Conference Proceedings (IEEE Cat. No.04TH8720) ; 4 ; 2697-2703 Vol.4
2004-01-01
449841 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
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