The ever-increasing penetration of Internet of Things (IoT) applications across all sectors require better information and communication security for IoT devices. Physical Unclonable Function (PUF) circuits are a low-cost method used for generating unique responses, ideal for key generation and device authentication in high-performance microprocessors. PUFs are extracted from manufacturing variations embedded in the hardware of accessible devices, thereby requiring no additional computation or modification. Static Random Access Memory (SRAM) PUFs are widely used with keys generated from power-up values for authentication. This work is based on improving device authentication in the context of LoRa, which is a low-power wide-area network (LPWAN) technology. This paper exploits the integration of Carrier Frequency Offsets (CFOs) and SRAM PUF to create a two-step authentication security solution for LoRaWAN called LoRa-PUF. The power-up state value of three SRAM chips from the same off-the-shelf manufacturer are analyzed for SRAM PUF properties and 36000 packets of CFOs of four LoRa device types have been analyzed for LoRa-PUF. Our results indicate that LoRa SRAMs serve as sources of reliable challenge-response pairs for PUFs and the CFOs of the LoRa device type can be classified during communication with more than 70% accuracy which can be implemented on resource-constrained LoRa microcontrollers.


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    Titel :

    LoRa-PUF: A Two-Step Security Solution for LoRaWAN


    Beteiligte:


    Erscheinungsdatum :

    01.06.2023


    Format / Umfang :

    6231092 byte





    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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