The development of telecommunications is a fundamental requirement of modern societies. Communication satellites were invented to serve as relays for many applications. For satellite communications systems, the frequency synthesizer is one of the key elements. The role of PLL lies in improving the radio signals of reception or transmission. This paper presents a [4–8] GHz frequency synthesizer for C-band satellite communications applications. The choice of phase margin and loop bandwidth are crucial for the system performance. Thus, the outcomes prove the importance of our design in satellite systems, with a lock time of 9.07 μs, a phase noise of -116.1 dBc/Hz at 1 MHz, and an RMS phase Jitter of 227 fs.


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    Titel :

    A PLL Frequency Synthesizer Design for C-band Satellite Communications


    Beteiligte:


    Erscheinungsdatum :

    07.06.2023


    Format / Umfang :

    909644 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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