We report on the design methodology of a fix-tuned split-block waveguide balanced frequency tripler working nominally at 300 GHz. It features six GaAs Schottky planar diodes in a balanced configuration. The circuit is fabricated with JPL membrane technology in order to minimize dielectric loading and insure an accurate and uniform thickness of the substrate. The multiplier power handling is limited by the breakdown voltage of the diodes that depends on the doping level of the active layer. With six diodes, the current choice for the doping level leads to medium power handling capabilities of about 50 mW. Increasing the number of diodes to eight is an option but lead to increased difficulties in design and fabrication.


    Zugriff

    Zugriff prüfen

    Verfügbarkeit in meiner Bibliothek prüfen

    Bestellung bei Subito €


    Exportieren, teilen und zitieren



    Titel :

    Design of a wideband 6-anode frequency tripler at 300 GHz with optimum balance


    Beteiligte:
    Maestrini, A. (Autor:in) / Tripon-Canseliet, C. (Autor:in) / Mehdi, I. (Autor:in)


    Erscheinungsdatum :

    01.01.2004


    Format / Umfang :

    180627 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Design of a wideband 900 GHz balanced frequency tripler for radioastronomy

    Tripon-Canseliet, C. / Maestrini, A. / Mehdi, I. | IEEE | 2004


    Design of W-Band Tripler

    Yang, T. / Liu, R. H. / Lin, W. G. | British Library Online Contents | 2000


    A High-Power Frequency Tripler for 100 GHz

    Bryllert, T. / Vukusic, J. / Emadi, T. A. et al. | IEEE | 2006


    A 260-340 GHz Dual Chip Frequency Tripler for THz Frequency Multiplier Chains

    Maestrini, Alain / Tripon-Canseliet, Charlotte / Ward, John S. et al. | IEEE | 2006


    Single-Barrier-Varactor 200-GHz Tripler

    Choudhury, Debabani / Frerking, Margaret A. / Batelaan, Paul D. | NTRS | 1994