An advanced, scalable, standards-based high performance computer architecture, derived from DARPA High Performance Computing research, and adapted for space on-board processing is presented. Networked multicomputing achieves supercomputing performance by combining low cost, high performance, highly integrated single chip microprocessors and high bandwidth inter-processor network fabrics. To achieve high processing efficiency, a two level multicomputer isolates the application processing resource from the communication and control layer. Here we present a two level space on-board processor architecture in which the communication and control layer of the multiprocessor has been allocated functions essential to achieve required survivability and reliability for space applications.
An open architecture for next generation space onboard processing
01.01.1999
806867 byte
Aufsatz (Konferenz)
Elektronische Ressource
Englisch
British Library Conference Proceedings | 2021
|The Next Generation Space Relay Architecture
AIAA | 2016
|