An advanced, scalable, standards-based high performance computer architecture, derived from DARPA High Performance Computing research, and adapted for space on-board processing is presented. Networked multicomputing achieves supercomputing performance by combining low cost, high performance, highly integrated single chip microprocessors and high bandwidth inter-processor network fabrics. To achieve high processing efficiency, a two level multicomputer isolates the application processing resource from the communication and control layer. Here we present a two level space on-board processor architecture in which the communication and control layer of the multiprocessor has been allocated functions essential to achieve required survivability and reliability for space applications.


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    Titel :

    An open architecture for next generation space onboard processing


    Beteiligte:
    Harris, M. (Autor:in) / Ngo, D. (Autor:in)


    Erscheinungsdatum :

    01.01.1999


    Format / Umfang :

    806867 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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