This paper deals with a photovoltaic (PV) array fed three-phase seven-level converter grid-tied configuration. The proposed system integrates PV array side to AC grid using minimum DC sources and single-phase transformers. The decoupled controller of the system exhibits active and reactive current controllers with coupling compensation network. A low-frequency switching is implemented using carrier-based pulse width modulation (PWM) technique. The system inherits the advantages of simple controller, single DC source and galvanic isolation. A model of the system is developed and its behavior is simulated in MATLAB/Simulink and validated in real-time using hardware in loop (HIL) platform using OPAL-RT.


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    Titel :

    A Hardware-In-Loop Platform for Three-Phase Grid-Tied PV Array Fed Multilevel Converter


    Beteiligte:
    Yadav, Shivam Kumar (Autor:in) / Mishra, Nidhi (Autor:in) / Singh, Bhim (Autor:in) / Chandra, Ambrish (Autor:in) / Al-Haddad, Kamal (Autor:in)


    Erscheinungsdatum :

    01.12.2019


    Format / Umfang :

    1870766 byte




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



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