The invention discloses a monitoring circuit of a vehicle speed reducer. The monitoring circuit comprises a single chip microcomputer U1; inner holes of the Hall sensors CT1, CT2 and CT3 are respectively used for allowing three preset electromagnetic valve signal lines on a vehicle speed reducer to pass through; inner holes of the Hall sensor CT4 and the Hall sensor CT5 are respectively used for passing through two preset indication signal lines on a vehicle speed reducer; the operational amplifiers U3-U7 are respectively connected with the Hall sensors CT1-CT5; and the single chip microcomputer U1 is respectively connected with the operational amplifiers U3-U7 and is used for obtaining the brake grade, the full brake time and the full release time of the vehicle speed reducer. The monitoring circuit of the vehicle speed reducer is scientific in design, the brake grade, the full brake time and the full release time of the vehicle speed reducer can be reliably monitored by monitoring the three preset electromagnetic valve signal lines and the two preset representation signal lines on the vehicle speed reducer, and the monitoring circuit has great practical significance.
本发明公开了一种车辆减速器的监测电路,包括单片机U1;霍尔传感器CT1、CT2和CT3的内孔,分别用于穿过车辆减速器上的预设三个电磁阀信号线;霍尔传感器CT4和CT5的内孔,分别用于穿过车辆减速器上的预设两个表示信号线;运算放大器U3~U7,分别与霍尔传感器CT1~CT5相连接;单片机U1,分别与运算放大器U3~U7相接,用于获得车辆减速器的制动等级、全制动时间和全缓解时间。本发明公开的车辆减速器的监测电路,设计科学,通过对车辆减速器上的预设三个电磁阀信号线以及预设两个表示信号线进行监测,能够可靠地对车辆减速器的制动等级、全制动时间和全缓解时间进行监测,具有重大的实践意义。
Monitoring circuit of vehicle speed reducer
一种车辆减速器的监测电路
2024-02-06
Patent
Elektronische Ressource
Chinesisch
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