Vedic mathematics is the name given to the ancient Indian system of mathematics that was rediscovered in the early twentieth century from ancient Indian sculptures (Vedas).The design of high speed Vedic multiplier using the techniques of Vedic Mathematics that have been modified to improve performance A high speed processor depends greatly on the multiplier as it isone of the key hardware blocks in most digital signal processing systems as well as in general processors. A typical processor devotes a considerable amount of processing time in performing arithmetic operations, particularly multiplication operations. Multiplication is one of the basic arithmetic operations and it requires substantially more hardware resources andprocessing time than addition and subtraction. Multiplication is a critical operation of Digital Signal processing (DSP) applications, Arithmetic and Logic Unit (ALU), multiply and Accumulated (MAC) unit. High Speed Multiplication is thus an essential requirement to increase the performance of processor. This paper proposes the design of a low power high speed algorithms for arithmeticlogic units using this ancient mathematics techniques.


    Zugriff

    Download


    Exportieren, teilen und zitieren



    Titel :

    A COMPARATIVE STUDY OF ARITHMETIC LOGIC UNIT BASED ON VEDIC MULTIPLIER


    Beteiligte:

    Erscheinungsdatum :

    2016-12-20


    Anmerkungen:

    International Engineering Journal For Research & Development; Vol. 2 No. Special Issue (2016): SPECIAL ISSUE; 6 ; 2349-0721


    Medientyp :

    Aufsatz (Zeitschrift)


    Format :

    Elektronische Ressource


    Sprache :

    Englisch



    Klassifikation :

    DDC:    629






    Application of Vedic Multiplier: Design of a FIR Filter

    Gaur, Nidhi / Kapur, Soumya / Mehra, Anu | IEEE | 2020


    Implementation of 9 bit Signed Vedic Multiplier on Zed Board

    Kapur, Soumya / Gaur, Nidhi / Vyas, Garima et al. | IEEE | 2018


    A 2x2 Bit Multiplier Using Hybrid 13T Full Adder with Vedic Mathematics Method

    Lee, Shing Jie / Ruslan, Siti Hawa | BASE | 2018

    Freier Zugriff