Space is a hazardous environment for electronic systems; therefore, the traditional approach to space computing relies upon radiation-hardened electronics, which are characteristically more expensive, larger, less energy-efficient, and generations behind in performance and functionality of modern commercial processors. Conversely, modern commercial processors, while providing the utmost in performance and energy efficiency, are susceptible to space radiation. The desire for more autonomous missions combined with growing demands for more detailed products from advanced sensors have challenged organizations to stay relevant by “doing more with less” to meet future requirements. To meet this need, researchers at the National Science Foundation Center for High-Performance Reconfigurable Computing have developed a new design concept in hybrid space computing that features fixed and reconfigurable processor architectures merged with an innovative system design that is a combination of three technologies: commercial devices, radiation-hardened components, and fault-tolerant computing. This concept has culminated in the development of several novel research platforms, most significantly the CSPv1 flight computer, which was successfully deployed on the International Space Station. Before flight, this CSPv1 design was analyzed and tested on the ground with reliability models and radiation tests. Recent in-flight data have validated the design and shown that CSPv1 exceeds reliability expectations predicted by models.
CSP Hybrid Space Computing
Journal of Aerospace Information Systems ; 15 , 4 ; 215-227
2018-01-30
13 pages
Aufsatz (Zeitschrift)
Elektronische Ressource
Englisch
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