A new macromodel for power MOS transistors (Power MOS), based on behavioral and electrical simulator, is described. The macromodel described in this paper is an optimized version of many macromodels already proposed; in particular, it derives from the macromodel developed by Cadence which is used in Analog Workbench (AWB) simulation environment with SPICEPLUS as core simulator. The proposed macromodel has been optimized to improve time characteristics, channel-on resistance thermal behavior, as well as forward and reverse characteristics of the drain-to-source diode of the MOS transistor, these improvements make this macromodel well suited to fit automotive applications since the above features are the main concern of electronic designers. Description of the circuit elements and the main equations of the overall macromodel will be outlined. Comparison among simulations and data sheet characteristics of actual devices prove how the macromodel's performance meet the behavior of the most used Power Mosfet devices in automotive switching applications.


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    Titel :

    A refined electrical macromodel for power MOS transistors


    Weitere Titelangaben:

    Ein verbessertes elektrisches Makromodell für MOS-Leistungstransistoren


    Beteiligte:
    Lasagna, D. (Autor:in) / Salerno, F. (Autor:in) / Semeraro, F. (Autor:in)


    Erscheinungsdatum :

    1995


    Format / Umfang :

    12 Seiten, 20 Bilder, 10 Quellen


    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch




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