For several years the agency has investigated system concepts and design techniques for on-board switching and routing techniques, this is in order to allow very small earth stations to operate in an European-wide multiple spotbeam coverage. The underlying concept is to entrust the payload with an ISDN compatible switching processor, controlled by a Master Control Centre (MCC) situated on ground. This Control Centre acts also as a central signalling point and provides, on user demand, links among different kinds of traffic terminals and networks. This paper describes in detail the architecture of the on-board processor which is currently being developed by ESA. The present development concerns the OBP-T-Switch which is a sub-set of the overall T-S-T system. The OBP-switch, with a througput of 262144 Mbit/s incorporates the following sub-systems: on-board system clock unit, control unit, time switching unit, receive interface unit, transmit interface unit. The main drive of the present development is the maximum integration degree reachable with the status of the art technology. A large use of ASICs will be done in fact in order to optimise the size of the switch itself.


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    Titel :

    On-board processor architecture for the ESA T-S-T/SS-TDMA system


    Weitere Titelangaben:

    Architektur eines bordeigenen Prozessors für das ESA T-S-T/SS-TDMA-System


    Beteiligte:
    Garafalo, G. (Autor:in)


    Erscheinungsdatum :

    1991


    Format / Umfang :

    3 Seiten, 3 Bilder




    Medientyp :

    Aufsatz (Konferenz)


    Format :

    Print


    Sprache :

    Englisch




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