Many designers are using model-based design tools for industrial applications yet few use them with direct to hardware implementation flows. In conjunction with MATLAB/Simulink, the Altera® DSP Builder Advanced Blockset provides a behavioral modeling flow with automated VHDL generation which supports algorithms designed in floating point, variable precision fixed point or a combination. DSP builder generates optimized FPGA hardware with fully predictable latency and provides the designer control to trade off FPGA resource usage against algorithm latency. The model based FPGA design flow is applied to the current control algorithm of an AC servo drive and the design flow and results discussed. Where the algorithm latency requires reducing further a technique for removing the processor entirely from the control loop is proposed.
Use of FPGA model-based design flow for motor control on servo drives
2012
8 Seiten, 1 Bild, 5 Quellen
Aufsatz (Konferenz)
Datenträger
Englisch
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