In the early 1990s was introduced the concept of 3D stacking of fully-processed chips as an alternative to successive processing of various CMOS layers on top of one another. In 1983, this idea was taken up by a collaboration of Siemens and FhG in a research project on 3D integration. The Inter-Chip Via (ICV) process was developed and thermal and speed performance properties were first discussed. Since then, many groups have joined the 3D stacking community and fostered developments of various technological variants of stacking, and discussed their business values. Recently, those activities intensified with interest focusing on stacks for memory and communication. The automotive field has its own opportunities and constraints. Currently, three-dimensional (3D) integration of semiconductor chips is in the phase of introduction in high-volume products. While memory and communication are the leading fields application, automotive use requires specific non-standard solutions. Some of these solutions are still being researched or are in development, whereas others are already in production.This paper elaborates on the different opportunities and constraints of automotive applications, presents different technological options, and discusses specific solutions. In all these concepts, testing is a problem. Although wafer level tests are performed, speed tests are usually not executed on the bare die level. Thus a single bad chip can lead to failure of the entire svstem. The examples show that different applications lead to different technological solutions. The system with the fastest performance is not always best-suited to the job. Application-specific constraints such as current driveability or form factor can be more important. Cost constraints are an additional concern.
Three-dimensional integration of silicon chips for automotive applications
2007
11 Seiten, 8 Bilder, 15 Quellen
Aufsatz (Konferenz)
Englisch
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