This paper describes a dual-processor platform for automotive power-train control with a high-bandwidth interconnection network among processors, memory, and I/0 sub-systems, which is suitable for a System-On-Chip (SOC) implementation. The two processors share memory and I/0 address space and can operate in parallel at full speed. The cost of this solution, in terms of gates and power dissipation, is not substantially higher than more classical architectures with a multi-master bus or multiple processor busses connected through gateways, but offers almost twice the performance.
Design and implementation of a dual processor platform for power-train systems
Entwurf und Implementierung einer Zwei-Prozessor-Plattform für die Leistungsregelung
2000
7 Seiten, 4 Bilder, 7 Quellen
Aufsatz (Konferenz)
Englisch
Design and implementation of a dual processor platform for powert-train systems
Kraftfahrwesen | 2000
|Dual shear plate power processor packaging design
AIAA | 1975
|Train unit platform door and train platform door assembly
Europäisches Patentamt | 2023
|Train unit platform door and train platform door assembly
Europäisches Patentamt | 2021
|