This paper has described the implementation of an asynchronous controller implemented in a programmable Logic array. The design methods including Map entered variable and mnemonic documented state diagrams techniques for PAL implementation of asynchronous machines are the same as used for conventional implementation. Programmable Array Logic circuits reduce the parts count, increase reliability, are economic to reproduce, allow some ECN's without changing the wiring and increase security.
Applications of PAL's and FPLA's to asynchronous controllers
Verwendung von PAL- und FPLA-Systemen in asynchronen Steuerungsanlagen
Fifteenth ; 15 ; 46-49
1981
4 Seiten, 4 Bilder, 5 Quellen
Aufsatz (Konferenz)
Englisch
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